The invention relates to high voltage field effect transistor bootstrap driver circuitry and, more particularly, to such circuitry including means to avoid hot electron operation of the devices in the circuit.
FET bootstrap drivers are useful in high voltage switching applications for the reason that capacitive coupling between the drain and gate of a driver allows the gate voltage of the driver to rise with the signal input at the drain. The close tracking of the gate and drain allows the driver to generate a source signal that closely tracks the voltage signal at the drain. Thus, the bootstrap driver FET is particularly well adapted to transmit high voltage signals and to thereby drive relatively heavy loads, such as from 25 to 50 picofarads, at signal rise times approaching 1 nanosecond.
The high voltage signal transmission capacity of a bootstrap driver is necessarily dependent upon the relative physical dimensions of the channel of the driver device. The relative dimensions of this channel are expressed as a width to length ratio that is essentially an indication of the relative current carrying capability of the driver. Increasing width to length ratios indicate a proportionately increasing FET driver current carrying capability. Thus, reduced channel lengths are necessary for rapid switching of heavy driver loads.
However, reduced channel lengths and elevated operational voltages result in appreciable emission of hot electrons from the silicon substrate of a FET into the gate silicon dioxide layer. The trapping of the emitted hot electrons in the gate insulator layer can result in threshold shift or transconductance degradation of the FET, as indicated in, T. H. Ning, C. M. Osburn, and H. N. Yu, "Effect of Electron Trapping on IGFET Characteristics," J. Electron. Materials, Vol. 6, March, 1977, pages 65-76.
Thus, due to the problem of hot electron degradation at elevated gate and drain to source voltages, prior art bootstrap driver circuits have been limited to relatively low operational FET voltages.
In particular, on chip bootstrap driver clock phase generation circuits have been limited to relatively low operational voltages and, therefore, have not been able to drive heavy electrical loads at high switching speeds.
Accordingly, it is an object of the invention to provide a means to operate FET bootstrap drivers at elevated operational voltages for high-load fast-switching applications and to avoid hot electron degradation of the drivers.
A further object of the invention is to provide a simple and effective high speed on chip clock phase generator adapted to receive a lightly loaded off chip clock input and to drive large on chip loads at rise times comparable to the rise time of the off chip clock.
Another object of the invention is to provide an on chip clock phase generator adapted to minimize constant DC power dissipation.
These and other objects of the invention will become apparent from a review of the detailed specification which follows and a consideration of the accompanying drawings.